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  3. Controlling Hreadyin signal from AHB eVC

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Controlling Hreadyin signal from AHB eVC

archive
archive over 18 years ago

Hi,

    I have problem in controlling Hreadyin signal(to force it low randomly) from AHB eVC. Is there any existing sequence in versity's AHB eVC to create such scenario and also i am very thankful if anyone suggests me the other ways to control the Hreadyin signal.

Thanks in advance
--Srik. 


Originally posted in cdnusers.org by srik
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    archive over 18 years ago

    Hello Srik,

    the HREADY_IN is a result of the slave mux, the decoder and the HREADY_OUT signal of the responding slave. If this slave is controlled by an active agent from the eVC, you can control it's HREADY_OUT by using the delay field of the slave response or settings for reset. Have a look in the AHB eVC documentation (looking for HREADY and delay ).

    Regards,
    -hannes


    Originally posted in cdnusers.org by hannes
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  • archive
    archive over 18 years ago

    Hi Guys, Can anybody provide AHB eVC. Thanks in advance


    Originally posted in cdnusers.org by vlsi_dude
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    archive over 18 years ago

    You can find the AHB eVC on the Cadence downloads site.
    Please be aware though that it's a commercial product and needs a licence before you can run simulations.


    Originally posted in cdnusers.org by stephenh
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    archive over 18 years ago

    Can any one help me on this. Any possible way to get throughput 100% for 2:1 arbiter.


    Originally posted in cdnusers.org by vlsi_dude
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    archive over 18 years ago

    Can any one help me on this. Any possible way to get throughput 100% for 2:1 bus arbiter.


    Originally posted in cdnusers.org by vlsi_dude
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  • archive
    archive over 17 years ago

    Hi Guys,
    Now i'm doing testcase for mux, dec and arbiter for 2 Master and 1 slave env buses.
    I want to ask one question, let us say current transfer is M1 and the M2 requesting and also granted. but granted master getting address and data access control after some cycles or depends on previous master data control with hready. So is this is proper activity.

    My slave does not support split transfer. is this related with retry transfer. can u give me details abt retry transfer.


    Can you please reply me.
    Thanks a lot.


    Originally posted in cdnusers.org by vlsi_dude
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    archive over 17 years ago

    Hi, I'm not sure if this will help, but, you can find information about how split transfers work in:
    http://infocenter.arm.com/help/topic/com.arm.doc.ihi0011a/IHI0011.pdf
    section 3.12

    As to the scenario you described, I'm not sure I exactly understand what you have written. Since I'm not an AHB expert, I think I will let some of the other users answer that...

    Cheers,
    Gery Osowiecki,
    TI Dallas


    Originally posted in cdnusers.org by geryo
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    archive over 17 years ago

    Hi Gery Osowiecki,

    Thanks a lot. I'll gothrough the pdf.

    Best Regards,
    KR


    Originally posted in cdnusers.org by vlsi_dude
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