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How will I do a HAL Hdl analysis on vhdl design?

sonam20

I want to do a HAL analysis on VHDL design.What are the procedure and steps for that?/

Please tell me

thanks,

Shivani

Parents

  • ncvhdl_p: *E,LIBNOM (/projects/MC_E_E1/wrk/ssharma/shi/trunk/src/design/backbone/wb_con/wb_generic.vhd,35|18): logical library name must be mapped to design library [11.2].
    USE DESIGN.BB_PKG.All;
             |
    ncvhdl_p: *E,IDENTU (/projects/MC_E_E1/wrk/ssharma/shi/trunk/src/design/backbone/wb_con/wb_generic.vhd,38|9): identifier (DESIGN) is not declared [10.3].

    This message, which seems to be the cause of most of the following error messages, is saying that the parser doesn't know where to look to find the compiled objects for the BB_PKG package. It doesn't know where the library called "DESIGN" was stored.

    Cadence tools use a file called "cds.lib" to map logical library names to physical disk locations. Search for "cds.lib" in the NCLaunch documentation for help in setting up that mapping file.

Reply

  • ncvhdl_p: *E,LIBNOM (/projects/MC_E_E1/wrk/ssharma/shi/trunk/src/design/backbone/wb_con/wb_generic.vhd,35|18): logical library name must be mapped to design library [11.2].
    USE DESIGN.BB_PKG.All;
             |
    ncvhdl_p: *E,IDENTU (/projects/MC_E_E1/wrk/ssharma/shi/trunk/src/design/backbone/wb_con/wb_generic.vhd,38|9): identifier (DESIGN) is not declared [10.3].

    This message, which seems to be the cause of most of the following error messages, is saying that the parser doesn't know where to look to find the compiled objects for the BB_PKG package. It doesn't know where the library called "DESIGN" was stored.

    Cadence tools use a file called "cds.lib" to map logical library names to physical disk locations. Search for "cds.lib" in the NCLaunch documentation for help in setting up that mapping file.

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