need solution for following error in cadence RTL synthesis tool

reg [7:0]cb[3:0][3:0];
                     |
Error   : Verilog-2001 feature. [VLOGPT-3] [read_hdl]
        : Multiple dimensions in file './sad.v' on line 8, column 22.
        : The design must be read in with 'read_hdl -v2001'.
reg [7:0]rb[3:0][3:0];
                     |
Error   : Verilog-2001 feature. [VLOGPT-3] [read_hdl]
        : Multiple dimensions in file './sad.v' on line 9, column 22.
reg [7:0]abs[3:0][3:0];
                      |
Error   : Verilog-2001 feature. [VLOGPT-3] [read_hdl]
        : Multiple dimensions in file './sad.v' on line 10, column 23.
reg cx1[3:0][3:0];
                 |
Error   : Verilog-2001 feature. [VLOGPT-3] [read_hdl]
        : Multiple dimensions in file './sad.v' on line 11, column 18.