(Cadence Genus Synthesis) How to use more than one library file for synthesis?

    #Script

    #Setting Library and Design Path
    set_attribute lib_search_path ../lib/

    set_attribute hdl_search_path ../design_files/

    #Setting Library and Design Files
    set_attribute library tech1.lib

    #Analyze and Elaborate the Design File
    read_hdl -sv count.sv
    elaborate

    # Apply Constraints and generate clocks
    read_sdc ../constraints/constraints.sdc

    # Synthesize the design to the target library
    synthesize -to_mapped -effort medium

    # Write out the reports
    report timing > count_timing.rep
    report gates  > count_cell.rep
    report power  > count_power.rep

    # Write out the structural Verilog and sdc files
    write_hdl > count_netlist.v
    write_sdc > count_sdc.sdc

How to write a script to import multiple library files say, tech1.lib, tech2.lib,... and synthesize the design with each and everone of them and generate reports? Also is there an option to make the tool to report best library to match timings of the design.

Thanks.