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High-Level Synthesis Forums

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Keep tie cells connection
started by on 17 Sep 2021 9:56 AM
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17 Sep 2021 9:56 AM
Syhthesizing bluespec verilog (.bsv) code with Cadence Genus
started by on 29 Aug 2021 11:49 PM
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575
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29 Aug 2021 11:49 PM
Why does Stratus HLS report this error?
started by on 2 Sep 2020 10:18 PM
2
3775
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13 Aug 2021 10:26 AM
Cadence genus Initialisation
started by on 21 Jun 2021 6:53 AM
0
1260
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21 Jun 2021 6:53 AM
convert .lib library file to .db file
started by on 8 Jun 2021 11:56 AM
0
1294
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8 Jun 2021 11:56 AM
How to change font size for help/menus ?
started by on 11 Feb 2021 8:06 AM
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837
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11 Feb 2021 8:06 AM
How to get full module names in report_area command
started by on 10 Oct 2020 1:00 PM
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3427
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10 Oct 2020 1:00 PM
Domino Logic Synthesis using Genus
started by on 22 Jan 2018 8:35 AM
3
17690
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11 Sep 2020 4:53 AM
Using Cadence Genus withou any libraries
started by on 6 Mar 2020 10:24 AM
1
6652
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1 Apr 2020 1:33 AM
Synthesis Area plus power estimate concatenation
started by on 7 Feb 2018 9:59 AM
12
59411
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19 Feb 2020 10:06 PM
Genus Synthesis Timing Report does not make any sense
started by on 3 Jan 2020 9:41 AM
0
6443
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3 Jan 2020 9:41 AM
High level synthesis
started by on 12 Sep 2019 4:49 AM
0
6710
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12 Sep 2019 4:49 AM
Synthesize net to flip-flop cell with differential output.
started by on 22 Jun 2019 3:47 PM
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7756
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22 Jun 2019 3:47 PM
Stratus PnR Configs
started by on 20 May 2019 5:14 AM
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7483
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20 May 2019 5:14 AM
Genus - Segmentation Fault
started by on 3 Oct 2018 3:38 AM
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3716
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3 Oct 2018 3:38 AM

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