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Syhthesizing bluespec verilog (.bsv) code with Cadence Genus

iamKarthikBK

I want to synthesize some flavor of RISC-V, but I only have the core in Bluespec Verilog (or Bluespec systemverilog ?) ( gitlab.com/.../chromite )
How do I proceed? Can Genus directly read these in Legacy UI with read_hdl?

I have a custom-designed standard cell library characterized using liberate. 

Thank you for your time in advance!

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