set_multicycle_path using clock enable signals

Hello!

For synthesis with Genus 17.1 I want to constrain a multi-cycle path inside one single clock domain from some flipflops using one clock enable signal to some other flipflops using a different clock enable signal. There is a solution for Altera Quartus <https://www.altera.com/support/support-resources/design-examples/design-software/timinganalyzer/exm-tq-clock-enable.html>, which works fine for Quartus, but not for Genus. After adapting the syntax of the Quartus solution I tried in Genus:

set_multicycle_path 4 -from [get_fanout [get_pins my_component/my_clock_enable_1_reg/q]]  -to [get_fanout [get_pins my_component/my_clock_enable_2_reg/q]]  -setup

but the <get_fanout> command gives a list, which includes objects, which are not supported by <set_multicycle_path>. Here is the relevant part of the error message:

Error : A given object is not suitable for this exception. [SDC-211] [set_multicycle_path]
: The 'set_multicycle_path' command does not allow '-from' specifications for pins on unmapped combinational or hierachical instances ...

The used clock-enable signals are used inside clocked processes as combinational logic and together with other combinational conditions the synthesis tool recognizes this as clock-enable. Here is the pseudo-code:

elsif rising_edge(clk) then

   if (clock_enable_1='1' AND other_condition='1') then

Ralf