• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Logic Design
  3. How to count number of paths in RTL-compiler group?

Stats

  • Locked Locked
  • Replies 5
  • Subscribers 62
  • Views 8311
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How to count number of paths in RTL-compiler group?

dkos
dkos over 17 years ago

 Hello all!

 Does anybody knows how to count number of paths in group, created by 'path_group' command? Or, at least, determine is group empty or not?

Thanks, dkos

  • Cancel
Parents
  • dkos
    dkos over 17 years ago

     Thanks for answer Johannes,

     This solution works. And do you have an idea how to detect if path group empty or not in tcl script? Let me clarify my problem a little:

     I automatically create cost groups between all clocks in design in script. If there are 2 clocks in design my script will create following cost groups:

        inputs_2_clk1, clk1_to_clk1,clk1_to_outputs, clk1_to_clk2,

        inputs_2_ clk2, clk2_to_clk2,clk2_to_outputs, clk2_to_clk1

    Althougth some groups are empty RTL compiler creates them. I suppose that this leads to memory usage increase and dramatically increase final output *.sdc file. So, I want to find a way to delete or not to create empty cost groups before synthesis starts...I have a feeling that I need to use linux 'grep' command on results of rc 'report timing -paths [eval [get_attribute paths <path-group name>]]' command, but I don't know how... 

    Thank, dkos 

     P.S. script that I use for cost group creation:

    #delete cost groups, created by create_clock commands
    puts "----------------------------------------------------------------------------"
    puts "Delete cost groups, created by create_clock commands and add own cost_groups"
    puts "----------------------------------------------------------------------------"
    rm [find / -cost *]

    set CLOCK_LIST [find / -clock *]
    #collect registers for all clocks
    set i 0
    foreach clock ${CLOCK_LIST} {
      set clock [basename $clock]
      puts "-- collect all regs for clock: ${clock}"
     
      set regs_of_clock($i) [all des seqs -clock ${clock}]
      set regs_col_clock [llength $regs_of_clock($i)]
      puts "-- number of regs: ${regs_col_clock}"
      incr i
    }
      set clock_num [llength ${CLOCK_LIST}]
      puts "-- number of clocks: $clock_num"

    #generate new cost groups
    set i 0
    foreach clock ${CLOCK_LIST} {
      set clock [basename $clock]
      puts "-- generate costgroups for clock: ${clock} --"
      puts "-------------------------------------------------------"

      set inList [all des inps -clock ${clock}]
      set outList [all des outs -clock ${clock}]
     
      if {[llength $regs_of_clock($i)] > 0} {
        #I2R paths
        if {[llength $inList] > 0} {
          puts "  -- generate costgroups for clock: I2${clock}"
          define_cost_group -name "I2${clock}"
          path_group -mode System -from $inList -to $regs_of_clock($i) -group I2${clock} -name I2${clock}
        }
        #R2O paths
        if {[llength $outList] > 0} {
          puts "  -- generate costgroups for clock: ${clock}2O"
          define_cost_group -name "${clock}2O"
          path_group -mode System -from $regs_of_clock($i) -to $outList -group ${clock}2O -name ${clock}2O
        }
        #R2R paths
        for {set j 0} {$j < $clock_num} {incr j} {
          set clockB [lindex ${CLOCK_LIST} $j]
          set clockB [basename $clockB]
          puts "  -- generate costgroups for clock: ${clock}->${clockB}"
       
          define_cost_group -name "${clock}2${clockB}"
          path_group -mode System -from $regs_of_clock($i) -to $regs_of_clock($j) -group ${clock}2${clockB} -name ${clock}2${clockB}
        }
      }
      incr i
    }

     

     

     

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • dkos
    dkos over 17 years ago

     Thanks for answer Johannes,

     This solution works. And do you have an idea how to detect if path group empty or not in tcl script? Let me clarify my problem a little:

     I automatically create cost groups between all clocks in design in script. If there are 2 clocks in design my script will create following cost groups:

        inputs_2_clk1, clk1_to_clk1,clk1_to_outputs, clk1_to_clk2,

        inputs_2_ clk2, clk2_to_clk2,clk2_to_outputs, clk2_to_clk1

    Althougth some groups are empty RTL compiler creates them. I suppose that this leads to memory usage increase and dramatically increase final output *.sdc file. So, I want to find a way to delete or not to create empty cost groups before synthesis starts...I have a feeling that I need to use linux 'grep' command on results of rc 'report timing -paths [eval [get_attribute paths <path-group name>]]' command, but I don't know how... 

    Thank, dkos 

     P.S. script that I use for cost group creation:

    #delete cost groups, created by create_clock commands
    puts "----------------------------------------------------------------------------"
    puts "Delete cost groups, created by create_clock commands and add own cost_groups"
    puts "----------------------------------------------------------------------------"
    rm [find / -cost *]

    set CLOCK_LIST [find / -clock *]
    #collect registers for all clocks
    set i 0
    foreach clock ${CLOCK_LIST} {
      set clock [basename $clock]
      puts "-- collect all regs for clock: ${clock}"
     
      set regs_of_clock($i) [all des seqs -clock ${clock}]
      set regs_col_clock [llength $regs_of_clock($i)]
      puts "-- number of regs: ${regs_col_clock}"
      incr i
    }
      set clock_num [llength ${CLOCK_LIST}]
      puts "-- number of clocks: $clock_num"

    #generate new cost groups
    set i 0
    foreach clock ${CLOCK_LIST} {
      set clock [basename $clock]
      puts "-- generate costgroups for clock: ${clock} --"
      puts "-------------------------------------------------------"

      set inList [all des inps -clock ${clock}]
      set outList [all des outs -clock ${clock}]
     
      if {[llength $regs_of_clock($i)] > 0} {
        #I2R paths
        if {[llength $inList] > 0} {
          puts "  -- generate costgroups for clock: I2${clock}"
          define_cost_group -name "I2${clock}"
          path_group -mode System -from $inList -to $regs_of_clock($i) -group I2${clock} -name I2${clock}
        }
        #R2O paths
        if {[llength $outList] > 0} {
          puts "  -- generate costgroups for clock: ${clock}2O"
          define_cost_group -name "${clock}2O"
          path_group -mode System -from $regs_of_clock($i) -to $outList -group ${clock}2O -name ${clock}2O
        }
        #R2R paths
        for {set j 0} {$j < $clock_num} {incr j} {
          set clockB [lindex ${CLOCK_LIST} $j]
          set clockB [basename $clockB]
          puts "  -- generate costgroups for clock: ${clock}->${clockB}"
       
          define_cost_group -name "${clock}2${clockB}"
          path_group -mode System -from $regs_of_clock($i) -to $regs_of_clock($j) -group ${clock}2${clockB} -name ${clock}2${clockB}
        }
      }
      incr i
    }

     

     

     

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information