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How to increase timing table dimensions in a lib file created from do_extract_model

vavendan

Hi

I generated a lib file with the command do_extract_model but the timing table dimension have only 2 dimensions. I need to increase the timing table in all range of the input slew clock, I mean , I need to generate timing tables with dimension 5x5. I used the switches -input_slews {input_slew1 input_slew2 ... input_slew5}, -clock_slews {clock_slew1 clock_slew2 ... clock_slew5 and output loads {load1 load2 ... load5}

But the timing tables keep the same dimension.

 

Please Could you help to solve this issue?

 

Thanks

  • Please forget about this post ... I've just realized, that you are talking about BuildGates, so you are in the correct forum ...
    Sorry! Unortunately, I have no answer for you ...

     

    Hi,

    Please send this question to the Digital Implementation forum.

    Regards,
    Johannes

     

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