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Reg .VCD file generation

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Hi,

 

   I need to run power analysis . so i need  .vcd file. So can any ione say how to generate a .vcd file. I have model sim, Xilix, RC compiler , SoC Encpunter 8.1 . From these can i generate a .vcd file if so let me know the steps pla.. i have lib, lef , sdc, sdf.etc file swith me.. plz help me.. i need some steps....i asked in digital forum they requested me to post here... i.e in this forum...

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  •  I saw your url and it was different andi couldnt get ehat i need.. i need the whole procedure to generate a vcd file either from rtl compiler or xilinx or modelsim... please help me this issue ir related to my thesis ....

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  •  I saw your url and it was different andi couldnt get ehat i need.. i need the whole procedure to generate a vcd file either from rtl compiler or xilinx or modelsim... please help me this issue ir related to my thesis ....

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