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  3. Unconnected inputs after clock_gating insert_obs

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Unconnected inputs after clock_gating insert_obs

maxb
maxb over 14 years ago

 After running clock_gating insert_obs, my design contains observability logic with unconnected inputs:

SDFFQN_X1_A7TR cg_LP_OBS_DFT_tpi_flop(.CK (cg_RC_CG_GCLK_PORT_2), .D(), .SI (DFT_sdi_6), .SE (DFT_sen), .QN (n_16538));

OAI31_XL_A7TR cg_LP_OBS_DFT_testpoint_12(.A0 (n_4628), .A1 (), .A2 (), .B0 (n_4625), .Y (n_4636));

How do I avoid getting these unconnected inputs, or can I connect them to a constant value? I already have set

set_attribute  hdl_unconnected_input_port_value  0
set_attribute  hdl_undriven_signal_value         0
set_attribute  hdl_undriven_output_port_value    0

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