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  3. RTL Compiler Error message [VLOGPT-46] [read_hdl]

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RTL Compiler Error message [VLOGPT-46] [read_hdl]

naveenkumar
naveenkumar over 13 years ago

Hi,

I started synthesizing a block TransmitTop in "rc", during compile it shows an error message 

Error   : An 'if' statement is required at the top of an always block to infer a latch or flip-flop. [VLOGPT-46] [read_hdl]

            : in file '/database/RTL/TransmitTop.v' on line 1314, column 5.
                   
                                                                     &

Error   : An 'if' statement is required at the top of an always block to infer a latch or flip-flop. [VLOGPT-46] [read_hdl]

            : in file '/database/RTL/TransmitTop.v' on line 1325, column 5.
 
 

 

always @(posedge TX_CLK or posedge reset_int)
1314   begin
1315   if (reset_int) begin
1316      byte_count_reg <= 0;
1317   end
1318   else begin
1319      byte_count_reg <= BYTE_COUNTER;
1320   end
1321  end
1322
1323 //Use for determining the number of bytes in the data
1324 always @(posedge TX_CLK or posedge reset_int)
1325 begin
1326   if (reset_int) begin
1327      final_byte_count <= 0;
1328   end
1329   else if (load_CRC8) begin
1330      if (BYTE_COUNTER == 64) begin
1331         final_byte_count <= 60;
1332      end
1333      else begin
1334         final_byte_count <= byte_count_reg;
1335    end
1336   end
1337   else if (start_CRC8) begin
1338      final_byte_count <= final_byte_count + 1;
1339   end
1340
1341   if (transmit_pause_frame) begin
1342     byte_count_stat <= 512;
1343   end
1344   else begin
1345     byte_count_stat <= final_byte_count;
1346   end
1347 end

Please help on this error.......

 

BestRegards

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  • croy
    croy over 13 years ago

    Hi Naveen

     

    Can you create a Service Request at support.cadence.com so someone from Customer Support can help you with this? Make sure you try running the RTL through a recent version of RC first.

     

    Chrystian

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