Passing Defines during read_hdl

Hi Bryan,

tried something similar and it worked as expected. I wonder if it is something in the RTL or maybe try without the -top option. I did a man on read_hdl and it seems to indicate that -top is related with structural netlists. Since you have an `ifdef I am assuming it is not structural although not necessarily the case. I usually read_hdl everything and specify the top on the elaborate command but RC seems to do a pretty good job figuring it out by itself anyhow. Here is my short example if you find it useful:


module define_hdl (
input wire in, clk,
output wire out
);

reg pipe0;

`ifdef use_neg_edge
always @(negedge clk) begin
pipe0 <= in;
end // always @ (negedge clk)
`else
always @(posedge clk) begin
pipe0 <= in;
end // always @ (posedge clk)
`endif

assign out = pipe0;

endmodule // define_hdl

good luck,
gh-

Well, I tried the exact same command today and it works. Not sure what was going on but none the less, problem resolved.