How to convert netlist 2 lib file

Hi Mattan,

I believe FE / SOC have a command called do_extract_model that will analyze all of the paths and create a .lib based on timing and setup/hold constraints for the I/Os. I personally have not tried it but it sounds like it may do what you need. I would be curious to hear how it goes since I may need it in the future.I suspect Primetime or ETS can do this as well.

good luck,
gh-

Hi

Thanks , what do you mean by FE/SOC which license this tool require ?

Mattan

do_extract_model works with SOC5.2 and above. It just uses encounter license. The important task would be to do a QA on the extracted .lib. For that your constraints file should be proper. The .lib extracted using the above method contains only Input to output paths. Basically its a black-box. So, you might need to spend a lot of time tweaking the constraints.

Would you please tell me how to decide the input transition time range and output load range???

Thanks a lot.

Hi zhjjg,

input transition time is frequently a percentage of your clock period and your library team or vendor can provide you with a good guidelines for this. Similarly for output load range.

gh-

Thanks!!

Currently I try to generate the lib file for a Mixed signal IP design.
According to your reply, Is it that I can get the input transition time and output load for a pin based on the related clock period?

To some extent. Obviously not all libraries are create equal but in the absence of any guidance, you should be able to derive these number from your clock speed targets. You certainly need to make sure that your clock speed targets are reasonable for the technology you are using, otherwise you will be spending some sweet time in timing closure.

regards,
gh-

Hi,

Im am trying to use do_extract_model to create a .lib file. I am using this in the top level of another netlist in  build gates. However I see that, when I run the flat netlist (no .lib used for sub block) I see some timing violations which I dont see on using the .lib file.

When I study the timing report, I see that the sub block (with .lib) shows a different propagation delay which is much lesser than what it actually is. Can you please let me know the reason for this? And when extracting the .lib file how are purely combinational paths handled?

Thanks,
Arun

Hi,

Im am trying to use do_extract_model to create a .lib file. I am using this in the top level of another netlist in  build gates. However I see that, when I run the flat netlist (no .lib used for sub block) I see some timing violations which I dont see on using the .lib file.

When I study the timing report, I see that the sub block (with .lib) shows a different propagation delay which is much lesser than what it actually is. Can you please let me know the reason for this? And when extracting the .lib file how are purely combinational paths handled?

Thanks,
Arun

Hi Arun,

this seems like a question for the support folks @ Cadence. I have used the command but cannot really say that I know that level of detail how the combo paths are characterized. I think the support guys should be able to better help u with that.

gh-