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How to integrate a full-custom designed layout with a semi-custom designed microprocessor.

Thommandram

Hello,

can someone tell me how to attach a memory/register file layout designed in(cadence virtuoso) with a Semi-Custom / Auto generated layout of a Microprocessor?

I am using rtl compiler- physical, soc encounter. Just need help on what design flow to be followed. suggest/ give some ideas please.. 

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