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How to synthesize without scan cell replacement

Maso

Hi,

 I synthesize RTL with RTL Compiler.

I have setup below options.

set_attr dft_connect_scan_data_pins_during_mapping ground [find / -design *]
set_attr dft_connect_shift_enable_during_mapping tie_off [find / -design *]
set_attr dft_scan_map_mode preserve [find / -design *]

But when I finished synthesis, I always get my netlist with scan cells replacement.

How can I avoid the scan cells replacement ?

 Thanks a lot.

Parents

  • Hi Brad,

    You are right. It's for functional purposes that RC mapped to scan flops.

    I have tried the options " set_attr use_scan_seqs_for_non_dft false / " you mentioned, and It's work to avoid scan flops replacement.

    But LEC still failed. I write out the dofile by using "write_do_lec" command.

    I found that when I set below options, it can pass LEC.

    set_attribute optimize_constant_0_flops false /
    set_attribute optimize_constant_1_flops false /

    But LEC will fail when I set them to true.

    In synopsys design compiler can write out svf file for formality to do equivalent check.

    How about RTL Compiler ?

    Thanks for your help very much.

Reply

  • Hi Brad,

    You are right. It's for functional purposes that RC mapped to scan flops.

    I have tried the options " set_attr use_scan_seqs_for_non_dft false / " you mentioned, and It's work to avoid scan flops replacement.

    But LEC still failed. I write out the dofile by using "write_do_lec" command.

    I found that when I set below options, it can pass LEC.

    set_attribute optimize_constant_0_flops false /
    set_attribute optimize_constant_1_flops false /

    But LEC will fail when I set them to true.

    In synopsys design compiler can write out svf file for formality to do equivalent check.

    How about RTL Compiler ?

    Thanks for your help very much.

Children
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