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Forwarding RTL pragmas to Encounter

Hi All,
Synthesis pragmas are widely used in Verilog designs. One of them is "infer_mux" is used, when the designer wants to ensure, that the logic will be mapped to mux.
RTL - Compiler respects the pragmas and mappes the logic to mux. The problem is, that the information about the pragma dissapear at this this point. When FE optimizes the netlist, the mux is converted to equivalent logic.
How can I ensure, that the mux will stay mux during all flow?
There are to much infer_mux pragmas, to search the muxes manually and to apply "dont_touch" constraint.
Thank you in advance,

Originally posted in cdnusers.org by Stalker

archive over 18 years ago

In RTL Compiler, you can get the list of such inferred muxes after generic synthesis. They would get mapped to the muxes and would have preserve size_delete_ok attribute.
You can put set_dont_touch on these muxes in FE so that they are not optimized.

Sudhir

Originally posted in cdnusers.org by sudhir.jain
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archive over 18 years ago

Hi Sudhir,

How can I get the list of infered muxes?

Regards,

Originally posted in cdnusers.org by Stalker
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archive over 18 years ago

This should work. (after generic synthesis)

filter preserve size_delete_ok [find /designs/ -instance *]

Originally posted in cdnusers.org by sudhir.jain
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archive over 18 years ago

I'll try.
Thanks a lot

Originally posted in cdnusers.org by Stalker
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