I am currently engaged in closure of CDC functional checks but to my frustration the run for CDC functional checks is taking a great deal of time and till now its just too slow to see it finish. I would like to know if there is any way on how I may investigate this problem and hopefully speed the runtime considerably. The design has a gate count of around 2.8 million.
When you say ''proper design set-up'' what exactly does the checklist cover apart from resetting flops. Could you please elaborate?