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  3. ncelab: *W,BIGWBS

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ncelab: *W,BIGWBS

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archive over 17 years ago

I am a newbie with NCSim.
 
I tried to elaborate a Verilog design with ncelab and this warning message was produced:
 
ncelab: *W,BIGWBS (,1140|38): bit-select index truncation.

I tried "nchelp ncelab BIGWBS" and it gave the following info:
 
The index in a bit-select has a width greater than a machine word, which is typically 32 bits. Only 32 bits are used.  
This truncation may result in undesired behavior.

 
 
Has Anyone come across this before?
 
Is it because of somthing wrong with my codes?
 
Is there any way to solve/get ride of/bypass this warning except using the "-NOWARN" OPTION?
 
Thanks


Originally posted in cdnusers.org by Felix
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    archive over 17 years ago

    I'm a Cadence Field AE. Can you post the line of code with the instantiation and the line of code with the module and interface ports. The code showing the declaration of the variables would be helpfull too. I'll take a look at it, but this is the type of thing you should file thru sourcelink.cadence.com. Todd Mackett Field Applications Engineer, Incisive


    Originally posted in cdnusers.org by tmackett
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  • archive
    archive over 17 years ago

    I'm a Cadence Field AE. Can you post the line of code with the instantiation and the line of code with the module and interface ports. The code showing the declaration of the variables would be helpfull too. I'll take a look at it, but this is the type of thing you should file thru sourcelink.cadence.com. Todd Mackett Field Applications Engineer, Incisive


    Originally posted in cdnusers.org by tmackett
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