• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Logic Design
  3. ncelab: *W,BIGWBS

Stats

  • Locked Locked
  • Replies 4
  • Subscribers 61
  • Views 3385
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

ncelab: *W,BIGWBS

archive
archive over 17 years ago

I am a newbie with NCSim.
 
I tried to elaborate a Verilog design with ncelab and this warning message was produced:
 
ncelab: *W,BIGWBS (,1140|38): bit-select index truncation.

I tried "nchelp ncelab BIGWBS" and it gave the following info:
 
The index in a bit-select has a width greater than a machine word, which is typically 32 bits. Only 32 bits are used.  
This truncation may result in undesired behavior.

 
 
Has Anyone come across this before?
 
Is it because of somthing wrong with my codes?
 
Is there any way to solve/get ride of/bypass this warning except using the "-NOWARN" OPTION?
 
Thanks


Originally posted in cdnusers.org by Felix
  • Cancel
Parents
  • archive
    archive over 17 years ago

    Through further debugging I have identified the cause of this warning.

    One array index instantiated in the netlist has the potential to store a value large than 32-bit.

    Thanks for tmackatt for the fast response.


    Originally posted in cdnusers.org by Felix
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • archive
    archive over 17 years ago

    Through further debugging I have identified the cause of this warning.

    One array index instantiated in the netlist has the potential to store a value large than 32-bit.

    Thanks for tmackatt for the fast response.


    Originally posted in cdnusers.org by Felix
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information