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TIP OF THE MONTH: Black Boxes

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 TIP OF THE MONTH: Blackboxes
 
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Users often have questions about black boxes. In Conformal there are several ways of creating black boxes.  Some of these ways can be obscure to the new user and might create frustration.  Whenever black boxes are involved with Equivalency Checking it is recommended that the user investigate after reading the design in.  
 
            Inside Conformal there are three commands that are used to create black boxes at different times and situations.  These commands are:
ADD NOTranslate Module
ADD Black Box  
SET UNDefined Cell Blackbox
 
Black boxes can also be caused by the verilog code with compiler directives that control translation. This happens when the translate directives effectively turn off translation of the part of the code containing the functionality of the design.  These can be particularly puzzling especially if no command to create black boxes is used in Conformal.  See the REPort BLack Box command described below.
 
            The commands provided with Conformal have separate intentions. 
The ADD NOTranslate Module command is used to black box modules for troubleshooting or to black box specific module in golden or revised designs where the code is present.  The ADD Black Box  command is most often used inside the hierarchical dofile to black box modules that have already been verified before moving on to the next higher level of the design.  The last command for creating blackboxes is SET UNDefined Cell Blackbox.  This command is a quick way to get going with a design that is not complete and can also rearrange the order of bussed pins with the –ascend switch.  When this command is executed, Conformal will automatically black box any module or cell not present.  The downside is what is verified may not conclusively prove equivalence and is potentially dangerous and should be used cautiously.  Blackboxing missing cells might miss cells/modules that need to be compared. Whenever black boxes are encountered in a design, reviewing the black boxes is a recommended next step.  So there are some other commands and techiniques which can help guide the user in debugging these.   
 
The first command to check the black boxes is pretty straight forward.  This is the REPort BLack Box command.  When the black boxes are reported there witll be (G) or (R) or (G R) along with the name of the module. 
 
    > report black box
    SYSTEM: (G R) ram1k
    SYSTEM: (G R) timer
 
This let’s the user know if the modules are balance between the golden and revised design. If the modules are not balanced start investigating.  Certain module types are generally acceptable to black box. These include rams and analog blocks like plls and voltage monitoring circuitry.  The -DETail switches on the REPort BLack Box command can help.  This switch will show the cause of the black box.  This could be undefined cells caused by notranslate command or empty logic caused by an empty wrapper.  The information provided can help in debugging those tricky situations.
 


Originally posted in cdnusers.org by brucebrunkan

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