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  3. Lowpower : CPF Compiler support.

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Lowpower : CPF Compiler support.

NTlp
NTlp over 12 years ago

Hi

I've cpf and rtl available with me. Now need to insert Lowpower cells in the netlist.

Please tell which compiler should i use to generate netlist which understands power-intent

written in CPF and accordingly place the lowpower cells in the netlist.

 Thanks in advance.

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  • grasshopper
    grasshopper over 12 years ago

     Hi NTIp,

     RC72 is 6 years old and LEC92 is 4 years old. Both versions are no longer supported so I would certainly encourage you to move to more up to date releases. It is not just a question of support but also there have been numerous issues addressed since and the CPF version supported back then was 1.0 and now it is either 1.1 or 2.0. Furthermore, I am not even sure CPF was a standard in the RC72 time frame.

    CPF work indeed requires you to have the GXL or Advanced Low Power license. As per inserting the LP cells manually and running standard synthesis, this is certainly possible but it will not lead to best QoS and you certainly risk implementation bugs introduced by your LP insertion solution. Some of those issues can lead to dead silicon as you probably know. For example, inserting incorrect isolation logic on the power domain controller just to mention one.

     hope this helps,

    gh-

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  • grasshopper
    grasshopper over 12 years ago

     Hi NTIp,

     RC72 is 6 years old and LEC92 is 4 years old. Both versions are no longer supported so I would certainly encourage you to move to more up to date releases. It is not just a question of support but also there have been numerous issues addressed since and the CPF version supported back then was 1.0 and now it is either 1.1 or 2.0. Furthermore, I am not even sure CPF was a standard in the RC72 time frame.

    CPF work indeed requires you to have the GXL or Advanced Low Power license. As per inserting the LP cells manually and running standard synthesis, this is certainly possible but it will not lead to best QoS and you certainly risk implementation bugs introduced by your LP insertion solution. Some of those issues can lead to dead silicon as you probably know. For example, inserting incorrect isolation logic on the power domain controller just to mention one.

     hope this helps,

    gh-

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