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Disable Scan Shift Enable in Functional Mode

Terry2000

Hello,

I'm trying to disable shift enable in function mode.  

This is the VHDL code:
 i_scan_shift_enable <= '0' when scan_mode_in = '0' else scan_shift_enable;
   

So "scan_shift_enable" is driven from a pad and  "i_scan_shift_enable" drives the flops.

However I can't seem to keep net i_scan_shift_enable preserved and even if I did would it be a valid pin for the DFT tools to hookup to.

How is this generally done? Is it necessary to instantiate tech cell, preserve and hookup to the output pin?  

Parents

  •  Hi,

     Have you checked that SE got connected to the clock gaters cells correctly?

     Is there actually a controllable path from the port scan_shift_enable to the clock gater enable cells?  If not, that is the reason for the failure.  You can check the controllablity of this path by using the dft_trace_back command:

     Usage: dft_trace_back [-mode <integer>] [-polarity] [-continue] [-print] <pin|port>

        [-mode <integer>]:
            trace back one level under the specified mode (0-3). 0: no constant propagation, 1:
            tied-constant propagation, 2: tied-constant and test-mode propagation, 3: tied-constant,
            test-mode and shift-enable propagation [default: 3]
        [-polarity]:
            also return whether the polarity changes through the trace
        [-continue]:
            continue the trace back until PI, sequential gate, complex instance or constant is reached
        [-print]:
            print the status and pin at every trace back
        <pin|port>:
            pin or port to start the back-trace from

     Use -mode 3 to propagate shift_enable.

    You could also try temporarily using a primary input for SE (rather than using -hookup_pin) just to prove to yourself that controlling the clock gaters with SE is ok.  But, I believe this to be a better solution than using scan_mode.

     

Reply

  •  Hi,

     Have you checked that SE got connected to the clock gaters cells correctly?

     Is there actually a controllable path from the port scan_shift_enable to the clock gater enable cells?  If not, that is the reason for the failure.  You can check the controllablity of this path by using the dft_trace_back command:

     Usage: dft_trace_back [-mode <integer>] [-polarity] [-continue] [-print] <pin|port>

        [-mode <integer>]:
            trace back one level under the specified mode (0-3). 0: no constant propagation, 1:
            tied-constant propagation, 2: tied-constant and test-mode propagation, 3: tied-constant,
            test-mode and shift-enable propagation [default: 3]
        [-polarity]:
            also return whether the polarity changes through the trace
        [-continue]:
            continue the trace back until PI, sequential gate, complex instance or constant is reached
        [-print]:
            print the status and pin at every trace back
        <pin|port>:
            pin or port to start the back-trace from

     Use -mode 3 to propagate shift_enable.

    You could also try temporarily using a primary input for SE (rather than using -hookup_pin) just to prove to yourself that controlling the clock gaters with SE is ok.  But, I believe this to be a better solution than using scan_mode.

     

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