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  3. Preserving structure in RTL Compiler

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Preserving structure in RTL Compiler

Aram Shahinyan
Aram Shahinyan over 11 years ago

 Dear all,

I have a AND-OR structure written in RTL in a module. After the synthesis I see that the same logic is implemented using different logic elements in different modules. In one module I see AND-OR is formed with 4 instances, in other module with 5 instances.

Is there a way to tell RC to use exactly the same AND-OR structure in different modules, that are using same piece of RTL code?

Thanks,

Aram

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  • grasshopper
    grasshopper over 11 years ago

    Hi Aram,

    structures are not infered by simple expresion lookup in most synthesis tools hence something like

     a = b && c;

    will not always map to 

    AND2X1 (a, b, c)

    and could just as easily be

    NOR2X1(a_int, b, c)

    BUFX1 (a, a_int)

    if such structure offers any advantages (i.e better for congestion, faster, smaller, better power, etc.)

    Not only that but many times, a change in one structure enables better optimization which is a common occurrance for arithmetic operations in building better CSA trees, etc.

    Long and short of it is that if you want a specific implementation in gates, you might as well hand-instantiate it and preserve/dont_touch but if you are hand-instantiating everything then why use a synthesis tool?

    Maybe you can share the rational behind your question

     

    hope this helps,

    gh-

     

     

     

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  • grasshopper
    grasshopper over 11 years ago

    Hi Aram,

    structures are not infered by simple expresion lookup in most synthesis tools hence something like

     a = b && c;

    will not always map to 

    AND2X1 (a, b, c)

    and could just as easily be

    NOR2X1(a_int, b, c)

    BUFX1 (a, a_int)

    if such structure offers any advantages (i.e better for congestion, faster, smaller, better power, etc.)

    Not only that but many times, a change in one structure enables better optimization which is a common occurrance for arithmetic operations in building better CSA trees, etc.

    Long and short of it is that if you want a specific implementation in gates, you might as well hand-instantiate it and preserve/dont_touch but if you are hand-instantiating everything then why use a synthesis tool?

    Maybe you can share the rational behind your question

     

    hope this helps,

    gh-

     

     

     

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