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conformal -Lec

Indira S
I am verifying a RTL vs NEtlist created by synopsys DC compiler. Some modules are black boxes by the tool. I think they are some memory modules. What is the way to preserve the interface information of the black box ie only the boundary info. 

  •  The command is "add notranslate modules <module> -both". Use it before design library read-in. Often the term "black boxing" means using "add notranslate modules"

     It is useful for memories, analog circuits, and "non-synthesizeable" code. If you don't "add notranslate module" to large memories then you can have problems with excessive run-time and server memory.

    It is also useful to check what is black boxed after read-in with the command "report black box".

    There are more examples, "troubleshooting info", etc. if you search http://support.cadence.com

     

    -ts

     

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