Stats

  • Locked Locked
  • Replies 1
  • Subscribers 62
  • Views 14448
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

RTL Compiler synthesis with inference to a custom cell

jjgs

I want to synthesize with inference to a custom cell. Like, in the below, instead of plain vanilla latch from foundry cell library, I want to infer my custom latch. How can I do that? I've heard of "// synopsys dc_script_begin" and "// synopsys dc_script_end"  but I am not sure how and if, at all. Any help/hint is appreciated.

    always @*

        if(!RESETN) Q = 0;

        else if(EN)    Q = D;

  • Hi jjgs,

    under what condition will you get custom cell and under what conditions will you get regular latch.

    There are many options here and I will briefly mention a few you can dig further:

    (1) RC/Genus indeed support dc_script_begin/end although not clear how you were told to use it

    (2) There is also pragma map_to_module

    (3) Chipware developer allows to link chipware to synthetic operators

    (4) Can EASILY use change_link command after mapping (i.e identify latches that need to be relinked and swap them)

    (5) Even EASIER, and provided pin names map, change libcell attribute of the library latches

    hope this helps,

    gh-

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.