I am new to this forum, so, please advise in case of any mistakes.
I am trying to work on a self-project wherein I intend to develop an RTL Design of SPI using SystemVerilog. I have read the specification sheet, however, I need some guidance as to how should I implement it.
I know there is a master and a slave, but when I looked at the specs sheet, there is a block diagram. Looking at the block diagram is very confusing.
May I have some guidance as to how should I move ahead? Like some stepwise advice as what should I start implementing first and what second and so on...
I am not asking for any code, just general advice.
Link to the specs sheet I am following:- SPI Block Guide V4 (nxp.com)
Thank you for reading and for your valuable time! I really appreciate it.