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Mixed-Signal simulations on FPGA using batch file

aliasnikhil

Hi,

I am trying to design an ADC simulation on Cadence but my professor says that I can simulate the analog portion on Cadence and then output the simulation values in a batch file. Using the values in the batch file as inputs to the FPGA (Xilinx Virtex-6), which has the rest of the digital circuit of the ADC, I can make it work. Is this possible? Can anyone provide me links to sources where I can read more on this? Any help would be appreciated. 

 Thanks! 

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  • Probably - it depends on what inputs you'd need into the FPGA simulation system. You can run an analog simulation in spectre or APS, and then ViVA provides means to export results into (say) comma-separated value files. Whether this is useful to you depends on the complete flow.

    The alternative is that you simulate both parts of the design together in AMS Designer.

    Regards,

    Andrew.

Reply

  • Probably - it depends on what inputs you'd need into the FPGA simulation system. You can run an analog simulation in spectre or APS, and then ViVA provides means to export results into (say) comma-separated value files. Whether this is useful to you depends on the complete flow.

    The alternative is that you simulate both parts of the design together in AMS Designer.

    Regards,

    Andrew.

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