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Welcome to the Cadence Mixed-Signal Forum!
started by admin on 9 Nov 2012 7:26 AM

0

38409

By admin
9 Nov 2012 7:26 AM

Error in PSS and PNoise simulation of a VCO followed by Frequency detector with 150MHz clock signal
started by Jayanta on 17 Sep 2020 3:48 AM

11

267

By ShawnLogan
19 Sep 2020 10:25 PM

generate histogram from multiple run automatically
started by olalivier on 17 Sep 2020 1:48 AM

2

85

By olalivier
17 Sep 2020 5:55 AM

can't evaluate value of a tran signal at derived value
started by olalivier on 15 Sep 2020 2:52 AM

5

149

By olalivier
17 Sep 2020 1:39 AM

verilogams generate-for loop with analog behavioural block
started by olalivier on 14 Sep 2020 1:29 AM

3

135

By Andrew Beckett
15 Sep 2020 3:13 AM

Bidirectional pin in wreal domain for AMS simulations
started by MonsieurCascode on 7 Sep 2020 1:02 AM

1

190

By Andrew Beckett
7 Sep 2020 10:40 PM

Loading SHM file in VIVA
started by debaabed on 19 Jul 2020 9:54 AM

2

625

By caitlincady
27 Aug 2020 2:13 AM

coupling between digital outputs in cosim?
started by DavidLou on 8 Aug 2020 12:09 PM

3

653

By ShawnLogan
9 Aug 2020 7:29 PM

straight line (best) fit using viva calculator
started by vamshiky on 4 Apr 2018 9:34 PM

13

41513

By sjwprc
7 Aug 2020 2:56 AM

Generating amsd, portmap automatically
started by debaabed on 28 Jul 2020 1:36 AM

0

455

By debaabed
28 Jul 2020 1:36 AM

Need help on identifying issue with VerilogAMS issue
started by Quantum7 on 17 Jul 2020 5:26 PM

1

588

By ShawnLogan
17 Jul 2020 8:09 PM

SNDR implementation in matlab
started by robert 21 on 26 Jun 2020 1:31 PM

1

782

By Andrew Beckett
27 Jun 2020 2:09 AM

Chop only section of the MPP lines
started by vadagar on 24 Jun 2020 3:04 AM

6

1111

By Andrew Beckett
26 Jun 2020 9:58 AM

Ghost test shows up
started by wgtkan on 24 Jun 2020 1:07 PM

4

946

By wgtkan
24 Jun 2020 2:36 PM

bidirectional wreal modeling (resistor in wreal)
started by freitas on 1 Mar 2013 12:37 PM

9

28833

By Andrew Beckett
23 Jun 2020 2:34 AM

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