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Defining a string parameter in a systemverilog model as a design variable

Soner

Hi, I have a systemverilog module with a string parameter:

parameter string filename = "default_name"; 

When I instantiate this module and edit its object properties, I see the filename property. Whatever I write into this field is passed as a string to the module. Is it possible to define a design variable (which value I can control in ADE) and pass this design variable to this field? 

The motivation is to be able to provide a unique filename in a parametric analysis. Otherwise, the file will be overwritten for each simulation.

 

  • I think so - although I've not tested this. You'd have to ensure that the parameter is defined in the CDF as parseAsCEL=yes though. If that doesn't work, please contact customer support (I'm assuming AMS is the simulator).

    KInd Regards,

    Andrew.

  • Hi Andrew,

    Here is a workaround: 

    1) Ensure that the parameter is defined in the CDF as parseAsCEL=yes

    2) Edit object properties of the instance, type pPar("myVariable")

    myVariable shows up as a design variable in ADE XL. Is it possible to make step #1 above automatic, just like parameters of type real?

    Regards,

    Soner Yaldiz 

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