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  3. VerilogA in AMS simulation: string parameter is not properly...

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VerilogA in AMS simulation: string parameter is not properly recognized

jsaenznoval
jsaenznoval over 11 years ago

 Hi,

 

I'm running  a AMS Simulation using  Cellview-based netlister and Spectre Solver. My simulation compiles fine when I configure all my cells to be only VerilogA. However, when I set the simulator to be AMS, Cellview-based netlister gives me the following error:

file: /home/jorge/smdh/zr16_lp/analog/designers/jorge/top_simulation/smdh_ips/P2S/veriloga/veriloga.va
    parameter string test_vector = "test_vector_adc1_en.dat" exclude {""};   // Test vector follows the pattern in the input file: Index   Logical value [0,1]
                               |
ncvlog: *E,EXPEQL (/home/jorge/smdh/zr16_lp/analog/designers/jorge/top_simulation/smdh_ips/P2S/veriloga/veriloga.va,42|28): expecting an equal sign ('=') [3.10(IEEE)].
    module worklib.P2S:va

 

The definition of string parameters works  fine in VerilogA. I don't know what is different from VerilogAMS and VerilogA on this case.

I really don't know how I could fix it.

Thanks!

 

 

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  • Andrew Beckett
    Andrew Beckett over 11 years ago

    Two solutions - either remove the "string" keyword (there's a Cadence Change Request to get this fixed in AMS), or use the OSS netlister (which will simulate the veriloga module as veriloga in the spectre solver rather than simulating it as VerilogAMS).

    Regards,

    Andrew.

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  • jsaenznoval
    jsaenznoval over 11 years ago

     Hi Andrew,

     Thanks for your helpful reply,

     

    Regards

     

    Jorge Johanny Sáenz N.

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