• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Mixed-Signal Design
  3. comparator delay with calculator

Stats

  • Locked Locked
  • Replies 4
  • Subscribers 65
  • Views 17093
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

comparator delay with calculator

Bob Mounger
Bob Mounger over 10 years ago

Goal: evaluate delay of a comparator to a slow ramp where the trip point is a variable parameter that is stepped across input range with virtuoso 6.1.6 spectre.

I.e ramp slews from 0 to 5V, trip point is a list of voltages e.g. 1.1, 2.2 3.3 4.4.

Each run the output trips in the display, but I want to quantify the delay with parametric simulations.

Method: use cross/intercept/delay commands of the calculator

Problem(s):

1) I thought I could use delay to select the difference between input crossing a voltage & the output crossing midscale. But I can't see how to tell the delay function to look at a parameter for the trip point on the input.

2) If I compute the output switching time with cross I get a table of floating point numbers.  Then if I evaluate the inputs crossing with intercept, I get another table of FP numbers. I thought great, I'll just subtract one from the other. but all that appears in the result is the intercept value.

3) Then I thought well, I'll evaluate the output switching time with another intercept statement. then I will have apples & apples in the subtraction. but the calculator tells me that subtracting intercept from intercept is invalid.

How do I do this?

  • Cancel
  • ashish2
    ashish2 over 5 years ago

    Hi Sir,

    I've designed latch based comparator. I need to calculate an offset voltage of the entire comparator circuit. How?

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • ashish2
    ashish2 over 5 years ago

    Hi Sir,

    I designed a schematic of a latch based dynamic comparator circuit on virtuoso. It comprises a couple of inputs and outputs apart i.e.- (Vin-),  ( Vin+ ) and (out-) (out+) respectively with 01+ and 01- interconnects preamplifier and latch stages of the comparator circuit. 

    How to calculate the delay / Speed of the comparator circuit?

    Kindly suggest.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 5 years ago in reply to ashish2

    Well, posting on the end of an 8-year old thread which only overlaps slightly with your question (and wasn't answered at the time) isn't the best way (especially if you read the forum guidelines which ask you not to do that).

    You might find it useful to look at this workshop: ADC Verification. It has a module on dynamic comparator characterisation (including measuring the offset). May not cover everything you want but should give you some useful pointers.

    Andrew.

    • Cancel
    • Vote Up +1 Vote Down
    • Cancel
  • ashish2
    ashish2 over 5 years ago in reply to Andrew Beckett

    Thanks Sir,

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information