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Ignore P-Cells in assembleDesign.

nevsan

I'm implementing the mixed signal flow in encounter and I have verified that I can use assemble design to flatten my digital blocks and my mixed signal blocks (analog layouts with digital cells included). I'm happy with the result.

However, when I apply it to a layout that has even one P-Cell in it, I am first told to enable express P-Cells (setting CDS_ENABLE_EXP_PCELL). I do that (and also export my P-Cell cache from Virtuoso), and I am then told that I need an 'encms' license. My reason for using assembleDesign in encounter is for mixed signal static timing analysis, and the P-Cells in question have absolutely no impact on any of the paths that I want to perform STA on. I don't need the EDI GXL mixed signal functionality for what I'm doing.

Obviously, I can make copies of the analog layouts and delete all of the offending P-Cells, but I was wondering if there was a better way to get assembleDesign to ignore all P-Cells.

Parents
  • In the Interoperability guide or at support.cadence.com you find the information on how to deal with PCells in the design. Analog Objects need to remain in the database and be saved again in EDI even if EDI doesn't use them. Here we use the .expressPcellCache to identify this PCells. For this a Mixed Signal license is used. In case you're only target is an STA on an AoT Design you could delete those PCells from your design if they aren't visible in the timing arc. Kind Regards, Andreas
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  • In the Interoperability guide or at support.cadence.com you find the information on how to deal with PCells in the design. Analog Objects need to remain in the database and be saved again in EDI even if EDI doesn't use them. Here we use the .expressPcellCache to identify this PCells. For this a Mixed Signal license is used. In case you're only target is an STA on an AoT Design you could delete those PCells from your design if they aren't visible in the timing arc. Kind Regards, Andreas
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