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Performing Mixed-Signal Simulation (Postlayout + Verilog-Functional)

dpalomeq

Hi,

I have Cadence IC 6.1.5 and I would like to perform a mixed-signal simualtion including a postlayout view and a digital circuit written (and not compiled) in Verilog. I have been reading about AMS Designer, Connect Modules, etc but I can't gather all the information in order to set up and run my simulations.

Is there in Cadence IC 6.1.5 documentation any tutorial or guide about this?

Thanks in advanced!

EDIT

I have found in the Cadence Documentation the 'Virtuoso AMS Designer Tutorials'. At some point of the first tutorial I have to use the 'connectLib' library but I can't find it. Where is it?

  • Add:

    INCLUDE $(inst_root_with:tools/bin/irun)/tools/inca/files/cds.lib

    to your cds.lib . Note that you'd need the INCISIVE tool stream in your path (<INCISIVEinstDir>/tools/bin) for this to work (you need that for the simulator anyway) - irun is the INCISIVE executable.

    Regards,

    Andrew.

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