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Spectre simulation with schematic in Verilog-A

JimmyLin

Hi,

I am running some simulations with blocks built by Verilog-A.

I would like to know if there are some assumptions made by the spectre simulator.

For example, the veriloga code of a vcvs is as follow.

module Vcvs (p, n, ps, ns);
inout p, n, ps, ns;
electrical p, n, ps, ns;
parameter gain = 1.0;

analog begin

  V(ps, ns) <+ gain * V(p, n);

end

endmodule

My question is

What is the expected voltage if the gain is 10 and input is a 1mV signal.

The only information from the code is V(ps, ns) will be 2 nodes with a 10mV voltage difference.

But what about the individual voltage of V(ps) and V(ns)?

Will it be (+5mV, -5mV) or (0, -10mV) or other combination?

In what way will the spectre simulator presume the value?

How can I expect the output?

Thank you for answering my concerns.

  • The model only defines that the voltage between ps and ns will be 10mV in your example. The absolute values will depend on how the instance of your Vcvs is connected up. If you have the ns pin connected to ground, then ns will be 0 and ps will be 10mV. If you have a 20mV vsource connected to ns, then ns will be 20mV and ps will be 30mV. Or if you have resistors connected to each of ps and ns, it will depend on the current flow through those devices to determine the absolute voltage.

    Put another way, your model defines nothing about the absolute voltage - just defines the differential voltage across the branch ps,ns.

    Regards,

    Andrew.

  • in reply to Andrew Beckett

    Thank you Andrew.

    Let's still take vcvs as the example.

    I know that if ns is connected to a reference Vref, the output will be Vref+gain*(p-n).

    But what if ns is floating?

    In my spectre simulation, if ns is floating, the output of ps is always 0V and ns is -gain*(p-n).

    It seems that spectre has some presumption when handling floating node/unknown condition.

  • in reply to JimmyLin

    Spectre doesn't have any "presumptions". However, floating nodes present a problem for circuit simulators, because they are trying to solve a system of simultaneous nonlinear differential equations, and a floating node is uncontrolled - you have an infinite number of potential solutions. Put another way, the matrix being solved is ill-conditioned. So what happens is that spectre identifies various situations that present floating nodes - either across various junctions that could be off, but also to ensure there is a path to ground. If I create a simple netlist that leaves both the ps and ns nodes floating:

    //
    vdc (in1 0) vsource dc=1m
    GAIN (in1 0 op1 op2) Vcvs gain=10.0

    ahdl_include "forum50.va"
    dc dc

    (forum50.va is your veriloga model), spectre then tells me:

    No DC path from node `op1' to ground, Gmin installed to provide path.

    By doing this, a solution can be found - if op1 is 0V, no current flows through the resistor and hence no current flows through the voltage source to the other end of the vsource, and so op1 is 0V, and op2 is -10mV. The node that the gmin gets inserted at in this situation would be somewhat arbitrary - it just depends on the order the simulator processes the design (which you have no control over). Since if the output is floating, any absolute voltage for op1 would be feasible, it's a correct solution - just as correct as any others.

    If you'd tried to aid the simulator by (say) adding 1Tohm (that's the gmin resistance that normally gets added) to each of op1 and op2, then you'd get op1=5mV and op2=-5mV (this ensures that the current through both resistors is the same).

    So it's not a matter of "assumptions" or "presumptions", but spectre trying to ensure that a solution can actually be found.

    Regards,

    Andrew

  • in reply to Andrew Beckett

    Indeed a very clear explanation.

    Thank you Andrew.

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