Using systemVerilog files with AMS simulator

Which IC version are you using? Which simulator version? On Simulation->Netlist and Run Options, which netlist mode is it running - is it "AMS Unified Netlister with irun/xrun", "OSS-based netlister with irun/xrun" or "Cellview-based netlister ..."?

Andrew

Hi Andrew,

I am using IC6.1.6 and irun 15.20. The netlister is set to UNL, OSS and cell based are disabled for me by company admin.

I just tried this. First of all, I would recommend that you use Right Mouse->Set CellView -> Mark as External HDL in the hierarchy editor rather than setting the view to symbol - that gives more info about the intent that this will be supplied externally. That said, I don't think that's the root cause here (although I was trying with the latest IC616 hotfix - ISR14.

What should happen is that if a file with .sv is given to irun, it should treat it as SystemVerilog file by default, unless you've overridden the default file extensions (maybe using IRUNOPTS in an hdl.var file).

In the terminal window, if you type "irun -helpfileext" it should tell you the extensions for SystemVerilog (and other file types):

systemverilog SystemVerilog HDL -sysv_ext .sv,.svp,.SV,.SVP,.svi,.svh,.vlib,.VLIB

If I (for example) created an hdl.var file with:

DEFINE IRUNOPTS -sysv_ext .SV,.SVLOG -vlog_ext +.sv

then if I then do "irun -helpfileext" I see (not showing all the lines):

verilog Verilog HDL -vlog_ext .v,.vp,.vs,.V,.VP,.VS,.sv
systemverilog SystemVerilog HDL -sysv_ext .SV,.SVLOG

Then that causes the kind of problem you're seeing. You can check if there's an hdl.var file in use by going to Simulation->Options->AMS Simulator, Miscellaneous tab, and clicking the "Display hdl.var used by irun/simulator" to see it.

So maybe that's the reason?

Andrew.

I do not have any hdl.var file listed in the  Miscellaneous tab. I also see the same item you have when running irun -helpfileext.   

 Is there a way I can check which version on verilog my current setup supports? I tried removing the -sv switch again and I noticed that most of my .v/.sv files parse without issue. This tells me that irun is recognizing systemverilog be default like you suggested. The file I have issues with is a piece of imported IP, it doesn't like the line " task read(input string fname); " I'm thinking maybe that particular structure is only supported in newer versions? 

I do not have any hdl.var file listed in the  Miscellaneous tab. I also see the same item you have when running irun -helpfileext.   

 Is there a way I can check which version on verilog my current setup supports? I tried removing the -sv switch again and I noticed that most of my .v/.sv files parse without issue. This tells me that irun is recognizing systemverilog be default like you suggested. The file I have issues with is a piece of imported IP, it doesn't like the line " task read(input string fname); " I'm thinking maybe that particular structure is only supported in newer versions? 

It's almost certainly not due to a change in the SystemVerilog version, although a new version of the IEEE standard, 1800-2017 was approved about a year ago and so wouldn't be in the Incisive version you're using. However, as with all standards, no tool offer completes support of the entire standard, so it may be due to a specific feature you're using that isn't supported, or it may be due to an actual error in the code you're using.

The best way forward would be to contact customer support over this as without seeing the precise details of the model that is failing to compile and the error messages, I can't really advise. The task definition you said above doesn't sound particularly unique to any version of SystemVerilog, so I'm not sure that's enough info to debug this.

Regards,

Andrew.