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Setting up AMS simulation using interface elements and UPF file.

jbaudino

Hello everyone.

I'm currently working on a mixed signal testbench with schematic on top of a digital design. The power behavior of the digital design is described using a UPF file and for the logic/electrical conversions I'm using interface elements. I have a couple of questions regarding the setup of a testbench like this one.

1. In the past we used to include a library containing all the digital verilog files and we would set up a config file for the testbench pointing to the functional view of the dig_top instance. However, given our new workflow using UPF we now consider it would be better to compile and elaborate the digital design + UPF separate of the testbench as a primary snapshot and then pointing the simulator to the elaborated digital design for simulation. I have not been able to point the config file using the Hierarchy Editor to the elaborated design, how would i do something like that? As a reference, the digital team first elaborates the design using xrun with -elaborate -mkprimsnap and -snapshot arguments. Once they have the primary snapshot they use xrun again to compile+elaborate+simulate the rest of the testbench.

2. With regards to the interface elements. Our digital design has two different power domains as described in the UPF file. I want to set up my ie cards such that my dig_top resolves with a VPOS_TOP DVS net and a sub instance such as dig_top.wrapper.lp_wapper resolves with a VPOS_LPM DVS net. However when i set these two rules, the one for dig_top seems to take precedence and all my nets resolve to the VPOS_TOP DVS net. Do you know of a workaround this issue so i can set hierarchical ie cards? Mind you, there are nets that go directly from the dig_top.wrapper.lp_wraper to the top design passing through upper hierarchy ports, but the driver is located in the dig_top.wrapper.lp_wrapper

3. I have read that it's possible to connect the UPF file with the power nets present in the schematic design on top of the digital design so that the power supply sets defined in the UPF file are linked to the actual nets powering the digital design on the schematic and in that way the _lps connect modules directly resolve to the correct power net. However I have not found much information on how to connect this two things, the UPF file and the schematic nets. Do you have any pointer on how to do something like that?

That's all for now, thanks in advance!

Juanjo

  • While trying to solve the second issue I came to need user defined connect rules library.

    I did the usual procedure of compiling and generating the conRules.il file but when i want to include them in the iecard setup i get the following error

    amsspice: *Error 'inhConnLib.CR_inhconn_full_fast' is not a valide Connect Rule, neither build-in nor user defined. Check the connect rule name and run again.

    each time i try to simulate. I include them using the extended ie setup and point to my connect.vams file in the inhConnLib library using the library manager. What is more weird is that if I run the simulation using connect modules instead of iecards, I can point to my custom connect rule and the simulation would run just as intended. Am i making a mistake in the way i'm integrating the custom connect lib with the iecards?

    I have not fund any more information on the error. I have just copied the inhConnRules from the instalation directory and modified vdd and vss to VPOS and VNEG.

    Someone knows what might be the issue?

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