• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Mixed-Signal Design
  3. altergroup

Stats

  • Locked Locked
  • Replies 3
  • Subscribers 64
  • Views 14994
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

altergroup

szier
szier over 5 years ago

I had used altergroups at my previous job with spectremdl. I've tried getting that working at my new job, creating alter.scs from scratch:

TT altergroup {
simulator lang = spectre
//parameters temp=125
//change2 alter param=temp value=85
parameters rparasitc=2.8E-12
include "fet.lib.scs" section=TT
include "res.lib.scs" section=TYP
include "cap.lib.scs" section=TYP
include "bipolar.lib.scs" section=TYP
simulator lang = spice
}


SS altergroup {
simulator lang = spectre
//parameters temp=125
//change2 alter param=temp value=85
parameters rparasitc=3.4E-12
include "fet.lib.scs" section=SS
include "res.lib.scs" section=MAX
include "cap.lib.scs" section=MAX
include "bipolar.lib.scs" section=MIN
simulator lang = spice
}

I'm missing something as I'm getting:

ERROR (SFE-2211): "/alter/alter.scs" 14: In altergroup `TT', instance `SS' was not previously defined. 

My .scs has:

include "fet.lib.scs" section=TT
include "res.lib.scs" section=TYP
include "cap.lib.scs" section=TYP
include "bipolar.lib.scs" section=TYP

include "alter.scs"

I know I have something simple missing but am just not getting it. Can someone point out what is wrong?

Side question, is it possible to override temp in the altergroup? My 2 tries (converted into comments) did not work out well.

  • Cancel
  • Andrew Beckett
    Andrew Beckett over 5 years ago

    Remove the simulator lang= lines, they are unnecessary (and the simulator lang=spice lines are actually what is breaking it). The file is entirely in Spectre syntax and you have a .scs suffix, so you don't need to keep switching language mode; if you change back to SPICE mode, then the end of the altergroup won't be recognised - which is why it goes wrong.

    You can add temperature by adding in each altergroup:

    alterOpts options temp=80

    (obviously with the temperature you want in each altergroup). You can use the same alterOpts instance name in every altergroup.

    So, to summarise, that means it now looks like this:

    TT altergroup {
      alterOpts options temp=25
      parameters rparasitc=2.8E-12
      include "fet.lib.scs" section=TT
      include "res.lib.scs" section=TYP
      include "cap.lib.scs" section=TYP
      include "bipolar.lib.scs" section=TYP
    }

    SS altergroup {
      alterOpts options temp=80
      parameters rparasitc=3.4E-12
      include "fet.lib.scs" section=SS
      include "res.lib.scs" section=MAX
      include "cap.lib.scs" section=MAX
      include "bipolar.lib.scs" section=MIN
    }

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • szier
    szier over 5 years ago in reply to Andrew Beckett

    This makes sense and worked well. The only reason I included the "simulator lang" statements was an earlier error message told me to put them in, I did and most of the errors went away. It should have occurred to me that it didn't make sense to do and that the message was just related to something else I had been doing wrong. Thanks for your help.

    That said, I have a question on something I have running OK but feel there's  a better way to do it. Here is what I have working:

    alias measurement trans {
    run tran

    real arise=cross(sig=V(A),dir='rise,n=1,thresh=pvdda/2, start=0)
    real afall=cross(sig=V(A),dir='fall,n=2,thresh=pvdda/2, start=0)
    real outrise=cross(sig=V(OUT),dir='rise,n=1,thresh=pvdda/2, start=0)
    real outfall=cross(sig=V(OUT),dir='fall,n=2,thresh=pvdda/2, start=0)
    export real vdd=pvdda
    export real ppvdd=pvdd
    export real rdelay=(outrise-arise)*1E12
    export real fdelay=(outfall-afall)*1E12
    export real delta=(abs(rdelay-fdelay))
    export real delay =(rdelay+fdelay)/2
    }
    real f1,f2,fout

    print fmt("%10s %10s %10s %10s\n","rdelay","fdelay","delta","delay") to="gaout"
    analysis process_array[]={SS,FF}
    analysis proces

    proces=process_array[0]
    run proces

    cout=1.2
    run trans as r0
    print fmt("%10V %10V %10V %10V\n",r0->rdelay,r0->fdelay,r0->delta,r0->delay) addto="gaout"

    proces=process_array[1]
    run proces

    cout=0.8
    run trans as r1
    print fmt("%10V %10V %10V %10V\n",r1->rdelay,r1->fdelay,r1->delta,r1->delay) addto="gaout"

    f1=max(r0->delta,r1->delta)
    f2=max(r0->delay,r1->delay)
    fout=(f1+f2)

    print fmt("f1=%g\n",f1) addto="gaout"
    print fmt("f2=%g\n",f2) addto="gaout"
    print fmt("fout=%g\n",fout) addto="gaout"

    I would like to extend it for 10 different process corners, which I can do but thought that there might be a way to do it like this:

    alias measurement trans {
    run tran

    real arise=cross(sig=V(A),dir='rise,n=1,thresh=pvdda/2, start=0)
    real afall=cross(sig=V(A),dir='fall,n=2,thresh=pvdda/2, start=0)
    real outrise=cross(sig=V(OUT),dir='rise,n=1,thresh=pvdda/2, start=0)
    real outfall=cross(sig=V(OUT),dir='fall,n=2,thresh=pvdda/2, start=0)
    export real vdd=pvdda
    export real ppvdd=pvdd
    export real rdelay=(outrise-arise)*1E12
    export real fdelay=(outfall-afall)*1E12
    export real delta=(abs(rdelay-fdelay))
    export real delay =(rdelay+fdelay)/2
    }
    real f1,f2,fout

    print fmt("%10s %10s %10s %10s\n","rdelay","fdelay","delta","delay") to="gaout"
    analysis process_array[]={SS,FF}
    analysis proces

    int i=0
    real couti[]={1.2,0.8}

    foreach i from{0,1}{
    proces=process_array[i]
    cout=couti[i]
    run proces
    run trans as r[i]
    print fmt("%10V %10V %10V %10V\n",r[i]->rdelay,r[i]->fdelay,r[i]->delta,r[i]->delay) addto="gaout"
    }
    f1=max(r[0]->delta,r[1]->delta)
    f2=max(r[0]->delay,r[1]->delay)
    fout=(f1+f2)

    print fmt("f1=%g\n",f1) addto="gaout"
    print fmt("f2=%g\n",f2) addto="gaout"
    print fmt("fout=%g\n",fout) addto="gaout"

    If I change r[i] to r and remove the the f1,f2,fout lines this runs. The thing I haven't figured out is how to refer to the runs inside the foreach loop in the f1, f2, fout lines. Is there a way to do this (I don't need r to be an array, it just seemed like a good way to explain what I was looking for)?

    Thanks

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • szier
    szier over 5 years ago in reply to szier

    I realized that is not that great an example of what I'm trying to do as in this case the f1,f2 coud be moved into the foreach loop with f1,f2 set to 0:

    f1=max(f1,r)

    This works in this case but I'm looking to access each of the runs results outside the loop in the general case.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information