I am making a system with a sigma delta modulator, which for reasons that are not relevant now, has a IIR decimation filter.

My supervisors recommended that I try writing it in veriloga rather than VHDL-AMS, so that I can keep using Spectre rather than a full AMS simulation.

So I wrote the below second order section that I hope to combine into higher order filters guided by Matlab filter design tools.

// VerilogA for zerogain, sos, veriloga

`include "constants.vams"

`include "disciplines.vams"

module sos(vin, vout, vclk);

input vin,vclk;

output vout;

electrical vin, vout, vclk;

parameter real vtrans_clk = 0.6;

parameter real B0=1;

parameter real B1=0;

parameter real B2=0;

parameter real A1=0;

parameter real A2=0;

parameter real tdel = 0 from [0:inf);

parameter real trise = 0 from [0:inf);

parameter real tfall = 0 from [0:inf);

real vin_val, vinz1, vinz2;

real vout_val, voutz1, voutz2;

analog begin

@ (cross(V(vclk) - vtrans_clk, 1)) begin

vinz2 = vinz1;

vinz1 = vin_val;

vin_val = V(vin);

voutz2 = voutz1;

voutz1 = vout_val;

vout_val = (vin_val*B0 + vinz1*B1 + vinz2*B2)/(1 + voutz1*A1 + voutz2*A2);

end

V(vout) <+ transition(vout_val,tdel,trise,tfall);

end

endmodule

However, I'm having some trouble simulating it. Inside my sigma-delta loop the output is mere microvolt, for a 100mV input signal.

So I figured I should make a proper testbench for this model. Of course I'm primarily interested in the frequency behavior, but it is not a LTI system.

I figured I might be able to do a pss/pac analysis, but this throws an error about hidden internal state.

As an alternative, I thought I could sweep a sine through it, but I could not find an easy way to do that, it does not appear that the tran simulation has a parameter sweep option.

Of course I did do a normal transient simulation, which works somewhat better than my full system, but it's hard to debug the system. Is there a way to plot the internal variables of the veriloga module?