Convergence issues in Phase Noise simulation of a PLL circuit

Dear Jayanta,

I see numerous issues with your simulation that may be responsible for your pss convergence issues.

1. You are using a very old version of spectre (Version 14.1.0.765.isr11 64bit -- 24 Jul 2015, MMSIM141ISR). I am not using the very latest version, but am using 18.1.ISR13 with MMSIM 19.10.373). There are many, many improvements since 2015 and hence I would recommend using a far more recent version of the tools.

2. Please note your initial transient analysis uses a maxstep of 80 ns with an errpreset of "moderate". With a 2.4 GHz VCO frequency whose period is 416 ps, I am concerned the accuracy of the estimated period is not sufficient - not to mention the width of the charge pump outputs that are far less than that! If the simulated estimate of the charge pump and VCO are not sufficiently close to their final values, pss will not converge.

3. For phase noise simulations of an LC based VCO - and a PLL is a superset of that - an errpreset of "conservative" is recommended.

4. Referring to your spectre.out file, did you notice the notices that indicate "Notice from spectre at time = 13.3334 ns during transient analysis `tran'.
Found trapezoidal ringing on node ..." and the final notice "Notice from spectre during transient analysis `tran'.
Trapezoidal ringing is detected during tran analysis.
Please use method=trap for better results and performance."

These suggest your accuracy may be compromised with your choice of integration algorithm (partly set by your choice of "errpreset").

5. Did you happen to read the Cadence document regarding the use of frequency dividers in a phase noise/pss analysis at URL:

support.cadence.com/.../ArticleAttachmentPortal

I might suggest you study some of its recommendations to provide some added guidance.

Shawn

Dear Shawn,

Thank you so much for your key suggestions. I followed the steps mentioned by you.

I could achieve the convergence after running the PSS simulation for about 5u sec. As suggested by you, I changed the errpreset to conservative, set the gmin to 1e-18, gmindc to 1e-18. Also the trapezoidal ringing is avoided by selecting method TRAP. The only concern is it is taking too much time about 1 hour to run and converge the PSS and Pnoise analysis. Any suggestion to reduce this simulation time, please.

Also we are in the process of upgrading the  cadence spectre to latest version.

Thanks a lot.

Regards,

Jayanta

Jayanta,

Not sure why you've set gmin to be so small (or gmindc). Both of these will make it harder to converge and are unlikely to lead to significantly improved accuracy unless you have extremely small leakage in your circuit that you need to model.

Are you using APS with multi-threading? That would be the first easy fix (although moving to a newer version should give further improvements).

Andrew

 Jayanta,

Andrew Beckett said:

Not sure why you've set gmin to be so small (or gmindc). Both of these will make it harder to converge and are unlikely to lead to significantly improved accuracy unless you have extremely small leakage in your circuit that you need to model.

I agree 110% with Andrew's comment! I've never found it necessary to reduce any of the gmin settings. In fact, as the default for HSPICE is 1e-11 and that for spectre is 1e-12, I've found it necessary for some netlists to set gmin to 1e-11 in spectre in lieu of 1e-12 to provide more robust convergence.

Jayanta said:

I changed the errpreset to conservative, set the gmin to 1e-18, gmindc to 1e-18. Also the trapezoidal ringing is avoided by selecting method TRAP.

When you select and errpreset of "conservative", the integration algorithm default is set to "gear2only". This setting will also tend to reduce or eliminate trapezoidal ringing. I know Andrew does not recommend this setting for VCO based netlists, my experience with LC VCO based netlists whose sustaining amplifiers have reasonable negative resistance margin, suggest it avoids some convergence issues.

Jayanta said:

The only concern is it is taking too much time about 1 hour to run and converge the PSS and Pnoise analysis. Any suggestion to reduce this simulation time, please.

1. I also agree with Andrew's comments regarding the use of +aps and multi-threading. As your PLL sounds as if it might have a significant size, you might consider using 4 to 8 cores. This will expedite finding a rapid solution as there are many computations required per timestep.

2. I would also recommend you consider saving the simulation state periodically during the 5 us tstab portion of your simulation (for example periodically every 1 us). If you have not done this before, there are some instructions at URL:

https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od0000000uDrGEAU&pageName=ArticleContent

If your simulation runs into any convergence issues, you can reload the state at the last timepoint and avoid having to re-run the entire tstab portion of the simulation. if the 5 us tstab portion completes successfully, you can delete the 1 us, 2 us, 3 us, and 4 us state files and retain only the 5 us state file to allow you to quickly start the pss portion of the simulation.

3. You might also consider running two identical pnoise simulations in parallel - perhaps one with spectre +aps and one with spectreX if you have that loaded when you update your Cadence tools. spectreX may provide a reduction in simulation elapsed time and you can compare the two results and behaviors. Using two simulations will also provide a "back-up" should either one fail for whatever reason prior to completion.

4. Finally, it is not unusual for the pss and pnoise segments of an LC VCO based netlist to take some time. As an example, for recent LC based VCO simulatons of a post-layout based netlist, the pss portion may take 2 to 3 days and the pnoise portion 2+ weeks - so be patient! Do not be concerned if there is a long time between log file updates between the pss and pnoise portion of the simulation. This is normal. You can be assured the pss portion is running reasonably well if you see its convergence criteria reduced on each iteration.

5. If your netlist is a post-layout based netlist, consider using a +hpa level of postlayout reduction.

I hope these provide some insight on my thoughts to assist you reduce (or set expectations!) your simulation times.

Shawn