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  3. In Cadence simulation how to introduce noise in current...

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In Cadence simulation how to introduce noise in current source

nisgup
nisgup over 4 years ago

In cadence simulation i am trying to simulate a comparator. and i am using ideal current source (or measurement case off chip or external current). Now i want to simulate this comparator with current source having some noise so that i can verify the measurement case (external current source might be having some noise).

Can any one suggest how can i introduce noise in current source for simulation. This comparator is very low power comparator. and external current is also very low (nA range) 

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  • Andrew Beckett
    Andrew Beckett over 4 years ago

    Not sure how you're going to simulate this (noise analyses, pnoise or hbnoise or maybe transient noise?), but the general approach would be to use either the Noise File Name field or the Number or noise/freq pairs field to enter the values directly on the form. The idea (for a current source) would be that you enter the noise values in A^2/Hz for specific frequencies. I can't really give more specific advice on the practicalities of simulation without knowing what kind of analysis you're aiming to do.

    Andrew

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  • nisgup
    nisgup over 4 years ago in reply to Andrew Beckett

    I am not doing any noise analysis... I just want to see the input noise effect on transient out. so i want to introduce noise in current source. 

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to nisgup

    Probably three choices then:

    1. Create a time-varying "noisy" signal which you could feed in as a PWL source
    2. Write a Verilog-A model which has some randomisation of the current to represent the noise
    3. (probably the simplest) use the parameters I mention to specify the noise and then perform a transient noise simulation. If you don't need the noise from the circuit, you could use the noiseon parameter of the transient to only include the noise from your current source.

    Andrew

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  • nisgup
    nisgup over 4 years ago in reply to Andrew Beckett

    I have one DC current source of 200nA. and one vpulse. I want to vary this current  on each cycle of pulse. like in 1st cycle 200nA , 2nd cycle 210nA, 3rd cycle 190nA like that. 

    I dont want constant noise on current source. I want to introduce a random noise on current source.

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to nisgup

    It would have been helpful if you'd stated this more clearly in the first place. I'm not sure what "constant noise" would mean - noise can't really be constant! However, since you want the current updated at each pulse, it sounds to me as if you want a Verilog A model which triggers the generation of a new random value at each rising clock edge (say) and then updates the output current based on that. 

    Andrew

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  • nisgup
    nisgup over 4 years ago in reply to Andrew Beckett

    Hi Andrew.. Thanks for the consistent reply.

    So there is no direct way to instantiate a source from analog lib where i can give random noise value in current source, because i am using virtuoso.

    I have to write a Verilog A model?

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to nisgup

    You can do it with a noise file, as I said earlier. If you describe the noise profile (in the frequency domain), then a transient noise simulation would generate random values where the spectrum of the time domain random values matches the noise spectrum specified by the file. That may not be entirely easy to do though if you don't know what the noise spectrum looks like and are only thinking about a time domain variation.

    Other than that, there's no built-in way of the current source in spectre producing random currents, and certainly not having that synchronised to your pulse. That's precisely the kind of benefit that Verilog-A brings - it gives you the ability to model what you want.

    Andrew

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to nisgup

    You can do it with a noise file, as I said earlier. If you describe the noise profile (in the frequency domain), then a transient noise simulation would generate random values where the spectrum of the time domain random values matches the noise spectrum specified by the file. That may not be entirely easy to do though if you don't know what the noise spectrum looks like and are only thinking about a time domain variation.

    Other than that, there's no built-in way of the current source in spectre producing random currents, and certainly not having that synchronised to your pulse. That's precisely the kind of benefit that Verilog-A brings - it gives you the ability to model what you want.

    Andrew

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  • nisgup
    nisgup over 4 years ago in reply to Andrew Beckett

    Thanks for the reply. It worked for me.

    I have one more doubt, I want to plot CV characteristic of NMOS. I sweeped gate voltage in DC analysis. can you guide me how to plot? 

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to nisgup
    nisgup said:
    I have one more doubt, I want to plot CV characteristic of NMOS. I sweeped gate voltage in DC analysis. can you guide me how to plot? 

    The forum guidelines ask you not to mix topics in one thread (it makes it confusing for anyone else searching and trying to find a solution). However, there are many, many posts in this forum (well, more so in the Custom IC Design forum, I expect) asking how to plot such characteristics - I'm sure with a bit of searching you can find them.

    Andrew

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