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Netlist bus naming convention in ADE XL and VCD files

Hi,

Please bear with me for a question; I've changed jobs and gone from working with bare netlister and Hspice simulation from command line to using ADE XL+Spectre.

I'm trying to simulate a large analog block with vcd stimulus.

My schematic has bus notation "bus<3:0>". My VCD has notation "bus[3:0]", so I run "alias *[*] *<*>" to fix that. The problem is that ADE XL drops a netlist with port names bus_3, bus_2, bus_1, bus_0 which obviously doesn't work.

I'm sure there's an easy fix here, but I can't find it. Can someone please advise?

-T

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