How to work with two different GLS netlist which contain same name sub cells in a chiptop AMS simulation?

Hi All,

Need you help to resolve the below issue.

I am doing chip-top AMS simulation with gls netlist.

There are two netlist.

1.adc_dac_test_top.pg.v

2.dac_decoder_top.pg.v

both contains a sub cell called sts_clock_mux.v

let's say for 1.adc_dac_test_top.pg.v netlist sts_clock_mux.v have 10 gates and for 2.dac_decoder_top.pg.v netlist sts_clock_mux.v have 20 gates.

So, at the time simulation it will take the last compiled version of sts_clock_mux.v cell and that will use by both the netlist. And because of that sdf annotation is not happening correctly.

Is there any way to avoid the conflict? Can we force the ams simulator to use the corresponding compiled cell only?

Warning:

xmvlog: *W,RECOME (adc_dac_test_top.pg.v,1002|19): recompiling design unit worklib.sts_clock_mux:v.
First compiled from line 738 of dac_decoder_top.pg.v.
module worklib.sts_clock_mux:v