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Array of design variables for an array of Instances

Basically same question as: https://community.cadence.com/cadence_technology_forums/f/mixed-signal-design/47008/create-an-array-of-variables-using-an-array-of-vdc-instances

Given: <0:3> instances of vpulse instances

Desire:

Assign desvar<0> design variable for <0> vpulse instance
Assign desvar<1> design variable for <1> vpulse instance
Assign desvar<2> design variable for <2> vpulse instance
Assign desvar<3> design variable for <3> vpulse instance
Simulate using spectre simulator in ADE Assembler

Does the bussetp.il method that Andrew wrote up work for this? support.cadence.com/.../ArticleAttachmentPortal

Can someone please confirm? Thanks!

Best regards, Vincent

Andrew Beckett over 3 years ago

You can't have different design variables on each iteration of an iterated instance. All you can do is create separate individual instances or create a pcell (similar to bussetp) which does this for you. You wouldn't be able to use bussetp to do this, but you could use something inspired by it, I guess.

Andrew
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VincentCheung over 3 years ago in reply to Andrew Beckett

Thanks Andrew! Please close this thread.
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