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xrun simulation elaborates systemverilog real as binary

JayBee

Dear all,
I have a mixed signal SystemVerilog model which simulates fine when I run it from ADE. 
I have real numbers as analog signals which I see as analog waveforms in simvision.
I guess this is a traditional AMS simulation, I have the connect rule ie cards set and all that stuff.

Now I want to use the xrun command line flow to simulate purely digital, since it is all verilog / systemverilog.
It does elaborate and simulate without errors.
However, all real types get mapped to binary types and I see only one bit output in the waveform.

I have tried xrun arguments -sv and -ams_flex. Both do work, but have the issue.

How can I get real numbers to be simulated as analog values in the xrun command line flow.
I fear that the question is really stupid, but I have been looking at RAKs and documents all over the forum and COS but cant't get it to work.

Thanks for all hints.
Cheers, Joachim

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