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Design of CMOS switch

Shankaranarayana

I  want to design a CMOS switch for SC integrator with reduced channel charge injection and clock feed through. I tried boot strapped TG with minimal size to reduce the signal dependency.

But I am not able to get the proper charge sharing. My operating frequency is 10MHz.

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  • Dear Shankaranarayana,

    Speaking for myself only, there really is not enough information in your question to provide any type of concrete suggestion. Charge injection is dependent on the switching signal (frequency and frequency content), the switch topology and its physical layout, and the impedances on either side. You also have not indicated what your objective is for "charge sharing", its metric nor the method you have chosen to simulating your charge sharing metric . I read your Forum post a few days ago and was hoping you might include some additional details if you want anyone to provide some thoughts.

    Shawn

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  • Dear Shankaranarayana,

    Speaking for myself only, there really is not enough information in your question to provide any type of concrete suggestion. Charge injection is dependent on the switching signal (frequency and frequency content), the switch topology and its physical layout, and the impedances on either side. You also have not indicated what your objective is for "charge sharing", its metric nor the method you have chosen to simulating your charge sharing metric . I read your Forum post a few days ago and was hoping you might include some additional details if you want anyone to provide some thoughts.

    Shawn

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