Simulation does something odd every 1.5ms

Dear all,
I have a model of mixed verilog digital and verilog-a and simulate it in ADE AMS environment interactively, which starts off xrun and then is controlled by the stimuli that a verilog code creates.
It does work fine in most of the time. However, it looks like every 1.5ms there is something odd happening. It looks like the analog simulator is restarting from 0 and forces sources in my design to reset to timestep 0 (where they reset for a couple of us) and then go to normal operation again. until after another 1.5ms they reset again.

I have set tran simulation time to 1s in ADE. Is there some other constraint, setting, whatever, which is set such that the analog solver starts over after 1.5ms? Does that ring a bell with some of you? Or is it the number of timesteps or iterations or whatever? Is there any setting that forces the analog solver to start over from timestep 0 ?

Thanks for any suggestions,
 Joachim