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Phase Frequency Detector

parultrivedi
parultrivedi over 2 years ago

Hello,
I designed a CMOS based conventional PFD for PLL, but don't know how to simulate phase characteristics of PFD(for observing Dead Zone and Blind Zone) in cadence. I am new in this field. Please tell me how to simulate phase characteristics of PFD step by step.
Sorry for inconvenience.
Thanks.

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  • parultrivedi
    parultrivedi over 2 years ago

    The software is Cadence-Virtuoso.

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  • ShawnLogan
    ShawnLogan over 2 years ago in reply to parultrivedi

    Dear parultrivedi,

    parultrivedi said:
    I designed a CMOS based conventional PFD for PLL, but don't know how to simulate phase characteristics of PFD(for observing Dead Zone and Blind Zone) in cadence. I am new in this field. Please tell me how to simulate phase characteristics of PFD step by step.

    If you are only simulating and concerned with a PFD (i.e., without a following charge-pump), then a common method to examine its performance is a set of transient simulations where the frequency of the reference clock and feedback clock inputs are at the same frequency but difference phases. You might set the phase delay between the two signals to be a design variable and set up a test bench and Explorer/Assembler test where you vary the phase delay between the two signals over a range that includes a phase difference of zero. You will need to set the increment of the phase difference to a small value in order to get an accurate assessment of the dead-zone. From the output of each simulation, average the output voltage of the PFD over one or more periods of the feedback/reference clock. You might set an output to the averaging expression. In this fashion, you can directly plot the average output of your PFD as a function of the phase difference between your feedback and reference clocks.  As an example of what you are attempting to create, from Figure 11 of the paper at reference [1]. Figure 1 shows the expected relationship for 3 difference PFD topologies.

    I hope this provides some useful information to help guide your simulations.

    Shawn

    Reference [1]  ietresearch.onlinelibrary.wiley.com/share/G3XJYCY4XAZQSJ5M99BZ?target=10.1049/iet-cds.2019.0135

    Figure 1

    Figure 11 of reference [1]

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to ShawnLogan

    You might also want to take a look at PLL Verification (Using ADE Explorer and XCELIUM) (this doesn't cover everything; it focuses more on noise - but it's worth reading too).

    Andrew

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to ShawnLogan

    You might also want to take a look at PLL Verification (Using ADE Explorer and XCELIUM) (this doesn't cover everything; it focuses more on noise - but it's worth reading too).

    Andrew

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