• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Mixed-Signal Design
  3. Zero-Order Hold Filter Implementation in Cadence AC Sim...

Stats

  • Locked Locked
  • Replies 5
  • Subscribers 65
  • Views 7983
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Zero-Order Hold Filter Implementation in Cadence AC Simulation

Alireza Razzaghi
Alireza Razzaghi over 2 years ago

Hello,

I would like to implement a zero-order hold filter in a Cadence ac simulation (s-domain). As we know, a zero-order hold filter can be expressed as (1-e^(-sT))/sT. Therefore, using an svcvs, which implements the s-domain transfer functions in either the polynomial or pole-zero forms does not seem to be straightforward to my observation. Verilog-A seems to be implementing s-domain transfer functions using their pole-zero information, too. I am wondering how I can implement a zero-order hold filter in s-domain in an ac simulation. Thank you for your time.

Regards,

-Alireza

  • Cancel
Parents
  • ShawnLogan
    ShawnLogan over 2 years ago

    Dear Alireza Razzaghi,

    Alireza Razzaghi said:
    I would like to implement a zero-order hold filter in a Cadence ac simulation (s-domain).

    Perhaps II am not fully understanding your objective, but I don't think makes sense to use an AC simulation to understand the response of a zero-order hold. A zero-order hold but its nature is a sampled entity and therefore will produce harmonics. An AC simulation is a linear simulation and will only compute the DC operating point of a circuit to determine model parameters to compute a linear transfer function. An AC simulation will never produce harmonics at any input frequency.

    In fact, the S domain equivalent of a zero-order hold is really just an approximate expression for its Z-domain response. Although there is a "transfer function" associated with the S domain equivalent model, it does not include the effect of frequency folding for frequencies above the Nyquist rate. 

    There have been discussions in this Forum in the past with respect to modeling a zero-order hold that you might find useful. For example, the following rather old Forum post might provide some insight.

    https://community.cadence.com/cadence_technology_forums/f/rf-design/22322/zvcvs-parameters-for-s-h-in-ac-implementation

    Shawn

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Alireza Razzaghi
    Alireza Razzaghi over 2 years ago in reply to ShawnLogan

    Hi Shawn,

    Thank you for your response. My objective is to model an ideal sample-and-hold in the s domain in Cadence. An ideal sample-and-hold, as we know, samples its continuous time input and holds each sample for the entire sampling period, resulting in a continuous time signal at its output. So, it involves sampling followed by the signal reconstruction using the samples of the original continuous time signal. This operation (called zero-order hold) induces phase shift to the reconstructed output signal in addition to its sinc-shaped amplitude response. Modeling of this filter in an s-domain system to replace an ideal sample-and-hold in an ac simulation is of my interest. The entire model is linear and time-invariant; hence, the s-domain and ac simulation. This modelling can be done; for instance, in Matlab but I started with Cadence because it is schematic driven.

    Regards,

    -Alireza

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • ShawnLogan
    ShawnLogan over 2 years ago in reply to Alireza Razzaghi

    Dear Alireza Razzaghi

    Alireza Razzaghi said:
    Modeling of this filter in an s-domain system to replace an ideal sample-and-hold in an ac simulation is of my interest. The entire model is linear and time-invariant;

    If you are not interested in the inherent frequency folding associated with the zero-order hold function and only its transfer function for frequencies less than the Nyquist, is there a reason you did not consider writing a verilog-A model of the s-domain expression and using it as a subcircuit in your AC simulation for the transfer function? The e^-sT term can be expanded to its Taylor series to determine the coefficients for the numerator. The numerator and denominator coefficients serve as inputs to the verilog-A function. I think the appropriate verilog-A function is laplace_zd(). 

    Shawn

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Alireza Razzaghi
    Alireza Razzaghi over 2 years ago in reply to ShawnLogan

    Hi Shawn, Taylor expansion of [1-e^(-sT)] is sT-(sT)^2/2+(sT)^3/6-(sT)^4/24+... Since ZOH(s)=[1-e(-sT)]/sT, we need to divide the Taylor expansion by sT, resulting in ZOH(s)=1-(sT)/2+(sT)^2/6-(sT)^3/24+... We cannot implement this polynomial, let's say just its first four terms, as svcvs because Cadence complains that the numerator has a higher order than denominator. Verilog-A implementation of an s-domain transfer function seems similar to that of an svcvs in terms of its input being the pole-zero set of the s-domain function. Therefore, my hunch is that we would receive the same error in Verilog-A but I have not tried it.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • Alireza Razzaghi
    Alireza Razzaghi over 2 years ago in reply to ShawnLogan

    Hi Shawn, Taylor expansion of [1-e^(-sT)] is sT-(sT)^2/2+(sT)^3/6-(sT)^4/24+... Since ZOH(s)=[1-e(-sT)]/sT, we need to divide the Taylor expansion by sT, resulting in ZOH(s)=1-(sT)/2+(sT)^2/6-(sT)^3/24+... We cannot implement this polynomial, let's say just its first four terms, as svcvs because Cadence complains that the numerator has a higher order than denominator. Verilog-A implementation of an s-domain transfer function seems similar to that of an svcvs in terms of its input being the pole-zero set of the s-domain function. Therefore, my hunch is that we would receive the same error in Verilog-A but I have not tried it.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
  • ShawnLogan
    ShawnLogan over 2 years ago in reply to Alireza Razzaghi

    Dear Alireza Razzaghi,

    Alireza Razzaghi said:
    We cannot implement this polynomial, let's say just its first four terms, as svcvs because Cadence complains that the numerator has a higher order than denominator. Verilog-A implementation of an s-domain transfer function seems similar to that of an svcvs in terms of its input being the pole-zero set of the s-domain function. Therefore, my hunch is that we would receive the same error in Verilog-A

    The verilog-A function laplace_zd is specifically for those functions of the form:

    There is no documentation that suggests the value of M must be less than or equal to N. I don't know why you assume that the Cadence implementation of an svcvs is identical to that of a verilog-A based cell using Laplace functions. The two are netlisted as totally different components in a totally different fashion.

    Shawn

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information