Stats

  • Locked Locked
  • Replies 1
  • Subscribers 64
  • Views 3436
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Liberate-ams GUI error: (LIB-203)

TM20240913386

Greetings,
I have problem when I run liberate for any design that consists of other blocks.
I always get this message ERROR (LIBAMS-203): (char_ams): Cell '4bit_adder' is scheduled for characterization but has no netlist, has an empty subckt or has no port on the subckt. This cell will be skipped. Check the netlist and rerun.
Despite that, Liberate works well for each of the cells that makes my design (4bit_adder) as they consist only from transistors. This should mean define_leafcell works well and all models that makes my design is defined.
When I generate nelist for my design, it's generated without any problems.
I use Liberate 23.1 and run it using GUI.
Can anyone give me a solution for this problem ?
Thanks in advance,


 

  • Guangjun Cao

    Can you check the generated file 'netlist' in the run directory. Is it complete?

    please also share the full logfile.

    Guangjun 

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.